Projects

showing 1 - 3 of 3
  • Members:
    5

    [PT-BR] Projeto para disciplina de Arquitetura de Computadores. Projeto de faculdade. [EN] Project for the discipline of Computer Architecture. University Project. The goal of this project is to walk you through the design and implementation (using VHDL) of a 16-bit pipelined RISC micro-processor that follows Computer Organization & Design.

  • Members:
    3

    Java-based HDL Design Fault Injection and Analysis Project. Basic functionality: 1. Fault Profile creating for specified HDL-projects. 2. Fault Injection procedure support for specified HDL-designs based on Fault Profiling. 3. HDL-faulty design generation.

  • Members:
    1

    Code::In is a VHDL editor which allows multiple actions, such as a TestBench generation using an editable template or a multiplexer generation. Code::In uses JavaSE6 and thus is platform-independant.

  • Mysql
  • Glassfish
  • Jruby
  • Rails
  • Nblogo
Terms of Use; Privacy Policy;
© 2010, Oracle Corporation and/or its affiliates
(revision 20120518.3c65429)
 
 
Close
loading
Please Confirm
Close